1. Field of the Invention
The present invention relates to a simulating circuit, and more particularly to a circuit model for simulating the write and read actions of the magnetic tunnel junction (MTJ) device.
2. Related Art
Magnetic Random Access Memory (MRAM) belongs to the non-volatile memory, which stores and records information by utilizing the resistance property, with the advantages of non-volatile, high intensity, high read and write speed, anti-radiation, etc. When writing data, the common method employs two current lines: bit line and write word line, wherein a memory unit selected by the intersection of the induction magnetic fields of the bit line and the write word line has its resistance changed by changing the magnetic direction of the magnetic material for the memory layer. When MRAM is reading the memory data, the current flow is provided to the selected magnetic memory unit, and the resistance of the unit is read to determine the digital value of the data.
The main memory unit of MRAM is the magnetic memory device made between the bit line and write word line, with a stack structure of multiple layers of magnetic metallic materials, also called Magnetic Tunnel Junction Device (MTJ), comprising a stack of a soft magnetic layer, a tunnel barrier layer, a hard magnetic layer, and a nonmagnetic conductor layer.
MTJ device determines the memory state to be “1” or “0”, according to the parallel or anti-parallel state in the magnetic direction of the two layers of magnetic materials (i.e., a free layer and a fixed layer) adjacent to the tunnel barrier layer. The write data is selected by the intersection of the bit line and write word line, and the magnetic direction of the magnetic material for the memory layer is changed by the magnetic field generated by the current flowing through the write word line and the bit line, and thus the resistance thereof is changed. The write action is as set forth by the Stoner-Wolhfarth equation:HX2/3+HY2/3=HK2/3.
When designing the simulating circuit for the MTJ device, it should be taken into account that when the data of the MTJ device is read out, the magneto-resistive (MR) ratio (MR %) of the MTJ device will decrease as the read bias increases. However, from the already disclosed prior art so far, no circuit model has been proposed for accurately simulating the write/read actions of the MTJ device.
In addition, the write of the MTJ device all depends on the magnetic field generated by the current, thus another issue to be considered is that when designing the circuit of the current source, the wire resistances of the write word line and bit line assigned to each MTJ device should be accounted. Particularly, when the memory array is enlarged, the load of the wires is significant, which may reduce the capacity of the current source to output current.
From the already disclosed prior art, no circuit model has been disclosed for accurately simulating the write/read actions of the MTJ device. As the development of the manufacturing process, MRAM has gradually approached the stage of being practical, thus a circuit model for accurately describing the write/read actions of the MTJ device is demanded for designing MRAM circuits.